The present invention relates generally to integrated circuit manufacturing and, more specifically, to improvements in the efficiency and reliability of integrated circuit manufacturing.
Typical integrated circuit devices contain multiple printed circuit layers. Each layer is insulated from its adjacent layer except where interlayer connections are selectively created. The individual circuit layers of an integrated circuit device are typically created by a photolithographic process. Each layer is formed on an integrated circuit device during a separate trip through the photolithographic manufacturing area. After each trip, the integrated circuit device is transported to other manufacturing areas where additional processing steps, such as etching and deposition, are performed. Thereafter, the integrated circuit device is returned to the photolithographic process manufacturing area so that an additional circuit layer may be applied. The process is then repeated until the desired number of circuit layers has been created.
Typically, during the manufacturing process, several integrated circuits are formed on a single silicon substrate which is commonly referred to in the industry as a xe2x80x9cwaferxe2x80x9d. A single wafer may, for example, contain about 100 integrated circuit devices. When the manufacture of the integrated circuits on a wafer is completed, the wafer is sawn apart such that the integrated circuits contained thereon are separated into individual units.
Integrated circuit wafers are generally processed in xe2x80x9clotsxe2x80x9d. Each lot may contain, for example, twenty-four wafers. Each lot represents a specific integrated circuit product, thus each wafer within a given lot will be identical. As can be appreciated from the above, during the integrated circuit manufacturing process, each lot of wafers will be returned to the photolithographic process numerous times in order to have individual circuit layers applied. Each circuit layer is sometimes referred to as a xe2x80x9cmask levelxe2x80x9d.
When a lot of wafers arrives at the photolithographic manufacturing area, the wafers are typically housed within a cassette which, in turn, is housed within a lot box. An information sheet, referred to as a xe2x80x9crun sheetxe2x80x9d is generally attached to the lot box and identifies the specific lot contained within the lot box.
The photolithographic process typically begins in a machine generally known in the industry as a xe2x80x9cresist spin trackxe2x80x9d machine. The resist spin track machine may also be referred to herein as a xe2x80x9ccoating machinexe2x80x9d. In the resist spin track machine, wafers are spin-coated with a light sensitive photo-resist coating. The photo-resist coating xe2x80x9crecipexe2x80x9d used differs for each lot and mask level. To begin the photolithographic process, a human operator removes the cassette from the lot box and places it on an indexer attached to the resist spin track machine. The human operator must also manually select the resist spin track recipe for the lot. To accomplish this, the operator typically enters both the lot number and the mask level (both of which are listed on the run sheet) into a computer database in order to determine the required resist spin track machine recipe for the lot. The operator then enters the recipe information into a control panel associated with the resist spin track machine indexer and depresses a start button, which may also be located on the indexer control panel.
After wafers have been coated with photo-resist material in the resist spin track machine, they are transferred to a xe2x80x9cwafer stepperxe2x80x9d machine. The wafer stepper machine serves to expose each wafer-mounted integrated circuit with a pattern corresponding to the desired circuit layer. In order to perform this function, the wafer stepper uses an imaging reticle, also commonly referred to in the industry simply as a xe2x80x9creticlexe2x80x9d, which contains an image of the circuit layer to be applied.
Before the wafer stepper can perform this task, however, it also must be programmed by a human operator. In order to accomplish this programming, the operator must query a central control system to determine the reticle number. The operator then enters both the lot number and the mask level into a separate computer database in order to determine other required wafer stepper parameters. Examples of such parameters include focus information and time of exposure information. As can be appreciated, each of these parameters will vary depending upon the specific lot and mask level of the lot.
After wafers leave the wafer stepper, they enter a developing device, commonly referred to in the industry as a xe2x80x9cdeveloperxe2x80x9d, in which the photoresist chemical exposed in the wafer stepper is fixed or developed. The developer is generally located within the same housing as the resist spin track machine. After a wafer has been developed in the developer, it is usually then returned to its original cassette. When all of the wafers in a lot have been developed and returned to their cassette, the photolithographic process for the mask level is completed and the cassette may then be moved to another processing phase, e.g., the etching process described above.
The above system has resulted in several undesirable operating characteristics. One such undesirable characteristic is mis-entry of information. Specifically, the necessity for human operators to manually look up and enter data (e.g., the recipe name for the resist spin track machine and the reticle, focus and exposure time data for the wafer stepper machine) commonly results in mis-processing due to errors in either obtaining the proper data, in transferring the proper data to the appropriate machine, or both. Such mis-processing, in turn, results in the need to rework material and/or scrapped product.
Another undesirable characteristic associated with the system described above relates to the fact that it is an asynchronous process. Specifically, human operator interface is required at random times in order to maintain the process. After the wafer stepper completes processing a lot, for example, an end of lot signal is produced by the wafer stepper machine. This end of lot signal, in turn, causes an alarm to be activated. Human input is required, in response to this alarm, before the wafer stepper may begin processing the next lot. As described above, the human operator, for example, must look up the parameters for the next lot and enter these parameters into the controller for the wafer stepper machine. If a human operator is not available when the wafer stepper finishes a lot, then the wafer stepper machine will sit idle until a human operator becomes available and completes the data entry task. This results in undesirable equipment downtime and, consequently, a loss of production efficiency for the photolithographic process. Compounding this problem is the fact that a typical photolithographic manufacturing facility may include multiple (e.g., 12) sets of resist spin track/wafer stepper machine combinations. The use of such multiple sets increases the likelihood that the human operator or operators will be otherwise occupied when a particular wafer stepper completes processing a lot.
Accordingly, it would be desirable to provide a manufacturing process which overcomes the problems described above and, thus, increases operating efficiency and reduces rework and scrap events.
The present invention is directed to a control system for a photolithographic integrated circuit manufacturing process. The control system incorporates a visual gating device in which a series of nests are provided. A barcode reader may be provided in conjunction with each nest. In operation, a human operator advances wafer lot boxes through the nest positions in accordance with a series of displays which are controlled by the control system. The barcode reader associated with each nest reads a barcode label on the wafer lot box contained within the nest to determine the lot number corresponding to the lot box. This lot number is then used by the control system to obtain setup parameters for the various photolithographic manufacturing process operations.